Raspberry Pi /RP2350 /POWMAN /SEQ_CFG

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Interpret as SEQ_CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HW_PWRUP_SRAM1)HW_PWRUP_SRAM1 0 (HW_PWRUP_SRAM0)HW_PWRUP_SRAM0 0 (USE_VREG_LP)USE_VREG_LP 0 (USE_VREG_HP)USE_VREG_HP 0 (USE_BOD_LP)USE_BOD_LP 0 (USE_BOD_HP)USE_BOD_HP 0 (RUN_LPOSC_IN_LP)RUN_LPOSC_IN_LP 0 (USE_FAST_POWCK)USE_FAST_POWCK 0 (USING_VREG_LP)USING_VREG_LP 0 (USING_BOD_LP)USING_BOD_LP 0 (USING_FAST_POWCK)USING_FAST_POWCK

Description

For configuration of the power sequencer Writes are ignored while POWMAN_STATE_CHANGING=1

Fields

HW_PWRUP_SRAM1

Specifies the power state of SRAM1 when powering up swcore from a low power state (P1.xxx) to a high power state (P0.0xx). 0=power-up 1=no change

HW_PWRUP_SRAM0

Specifies the power state of SRAM0 when powering up swcore from a low power state (P1.xxx) to a high power state (P0.0xx). 0=power-up 1=no change

USE_VREG_LP

Set to 0 to prevent automatic switching to vreg low power mode when switched-core is powered down This setting takes effect when the swcore is next powered down

USE_VREG_HP

Set to 0 to prevent automatic switching to vreg high power mode when switched-core is powered up This setting takes effect when the swcore is next powered up

USE_BOD_LP

Set to 0 to prevent automatic switching to bod low power mode when switched-core is powered down This setting takes effect when the swcore is next powered down

USE_BOD_HP

Set to 0 to prevent automatic switching to bod high power mode when switched-core is powered up This setting takes effect when the swcore is next powered up

RUN_LPOSC_IN_LP

Set to 0 to stop the low power osc when the switched-core is powered down, which is unwise if using it to clock the timer This setting takes effect when the swcore is next powered down

USE_FAST_POWCK

selects the reference clock (clk_ref) as the source of the POWMAN clock when switched-core is powered. The POWMAN clock always switches to the slow clock (lposc) when switched-core is powered down because the fast clock stops running. 0 always run the POWMAN clock from the slow clock (lposc) 1 run the POWMAN clock from the fast clock when available This setting takes effect when a power up sequence is next run

USING_VREG_LP

Indicates the voltage regulator (VREG) mode 0 = VREG high power mode which is the default 1 = VREG low power mode

USING_BOD_LP

Indicates the brown-out detector (BOD) mode 0 = BOD high power mode which is the default 1 = BOD low power mode

USING_FAST_POWCK

0 indicates the POWMAN clock is running from the low power oscillator (32kHz) 1 indicates the POWMAN clock is running from the reference clock (2-50MHz)

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